This invention relates generally to chromatographic systems and methodology, and more specifically, relates to an improved circuit for automatically balancing the detector output in a gas chromatography system.
In modern, highly automated types of gas chromatography systems, the output from the system detector is typically provided to an operational amplified which is also provided with a balancing signal. The latter functions to zero the amplifier output over its range of interest, so as to effectively establish a zero baseline, after which subsequent readout information from the chromatographic system may be properly processed. The said operational amplifier is commonly provided with a series of paralleling resistors; switching among the resistors is utilized to enable operation in different ranges of the instrument, i.e., by such switching the amplifier may be operated at various sensitivity ranges.
In a typical operation predicated on the sophisticated type of system above set forth, the output from the operational amplifier may be provided to a computer, into which the operator sets system parameters, i.e., information regarding the type of analysis being performed, the range contemplated for operation, etc. Depending upon the information set into the computer by the operator, an adjustment is enabled, automatic or otherwise, in the range of the operational amplifier, which is to say that one or another of the parallel range resistors are switched into the amplifier circuit. This action in turn, necessitates that an adjustment process be effected in the amplifier balancing each time a change is made in amplifier sensitivity. In the past this has been effected by various techniques including the use of simple manual adjustment for varying the inputs provided to the amplifier to attain a zero balance. Such techniques are obviously laborious, time consuming, and not particularly effective or repeatable.
On the other hand, more sophisticated techniques have been known for use in achieving consistent zero balancing of the aforementioned amplifier. In particular, the computer may be provided with appropriate data which can be stored at the computer memory, which data reflects the adjustments to be effected in the amplifier, i.e., in the balancing signal fed back to same, for any particular range of amplifier operation. Since the correction signal is an analog signal, this sort of corrective information must be extracted from the computer memory, routed to an appropriate latching point, and then converted into usable analog form by means of a digital-to-analog converter (DAC). This last mentioned approach while in principle capable of fully satisfactory performance, has the significant drawback of (under certain conditions) creating undue expense and complexity in the associated system. In particular, it is found in practice that in order to achieve the type of signal resolution required for typical operations, a very high bit DAC must be used. As is well known to those familiar with the present art, however, the cost of these solid state components rises rapidly with the required memory capacity, and the use of high bit DACs for the present purposes, can be virtually prohibitive in terms of cost and related complexity factors.